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NCP1561 Push-Pull PWM Controller for 48 V Telecom Systems
The NCP1561 Push-Pull PWM controller contains all the features and flexibility needed to implement high efficiency dc-dc converters using voltage or current-mode control. This device can be configured in any dual ended topology such as push-pull or half-bridge. It can also be used for forward topologies requiring a 50% maximum duty cycle. This device is ideally suited for 48 V telecom, 42 V automotive systems and 12 V input applications. The NCP1561 cost effectively reduce system part count by incorporating a high voltage startup regulator, line undervoltage detector, single resistor oscillator setting, dual mode overcurrent protection, soft-start and single resistor feedforward ramp generator. The oscillator frequency can be adjusted up to 250 kHz.
Features http://onsemi.com MARKING DIAGRAM
16 SO-16 D SUFFIX CASE 751B 1 1 NCP1561 = Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week NCP1561 AWLYWW
16
* * * * * * * * * * * *
Internal High Voltage Startup Regulator Minimum Operating Voltage of 21.5 V Voltage or Current-Mode Control Capability Single Resistor Oscillator Frequency Setting Adjustable Frequency up to 250 kHz Fast Line Feedforward Line Undervoltage Lockout Dual Mode Overcurrent Protection Programmable Maximum Duty Cycle Control Maximum Duty Cycle Proportional to Line Voltage Programmable Soft-Start Precision 5.0 V Reference
PIN ASSIGNMENTS
Vin UV RAMP_OUT FF CS CSKIP RT DCMAX VAUX OUT1 GND OUT2 RAMP_IN VREF VEA SS
Typical Applications
* 48 V Telecommunication Power Converters * Industrial Power Converters * 42 V Automotive Systems
M4 C1 C2 M2 OUT1 M3 High Side Driver Driver M1 OUT2 Opto TX1
ORDERING INFORMATION
Device NCP1561DR2 Package SO-16 Shipping 2500 Units/Reel
Vin
+ -
Startup
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
Lout Cout
Feedforward
NCP1561
OUT2 OUT1
Error Amplifier
Figure 1. Half-Bridge Block Diagram
(c) Semiconductor Components Industries, LLC, 2004
1
August, 2004 - Rev. 3
Publication Order Number NCP1561/D
NCP1561
Vin
High Voltage Startup Regulator 5.0 V Reference Thermal Shutdown
VAUX
VREF
UV CS
UV Fault Detection
OUT1 Modulator Output Stage OUT2
CSKIP RT Oscillator FF VEA SS GND DCMAX RAMP_OUT RAMP_IN
Figure 2. Simplified Block Diagram
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NCP1561
VAUX Vin 1 Disable IAUX VAUX(on) - + 5.0 V Reference DIS Disable_VREF One Shot Pulse (250 ns) + - Thermal Shutdown + - VREF 15 CSKIP 6 CCSKIP One Shot Pulse (600 ns) 5 CS + - + 1.2 V - + - Softstart Comparator Max DC Comparator - + Oscillator Ramp + VDC(inv) - STOP 10 pF + + 1.3 V* - * Trimmed during manufacturing to obtain 1.3 V with RT = 101 kW - 2V + - + 2V - 38 kW 12 mA Disable - + - + + 2V - Clock Q Dominant Reset Latch R S TF/F Q VAUX 13 Q OUT1 - + 1.52 V VAUX VAUX(on)/VAUX(off) Output Latch S Dominant Reset Q Latch R STOP Enable_ss VREF 11
16 VAUX CAUX Vin
2 UV
OUT2
VREF PWM Comparator - + 10 2 kW 20 kW 12 RAMP_IN 2V 29 kW 29 kW 8 DCMAX RP VREF RMDP -+ VEA REA
+ 1.0 V - VREF
CURRENT MIRROR 6 mA 9 SS CSS 7 RT RT Enable_ss I1 I1 2
2V
Vin RFF I+ + + V - - 10.8 pF
Clock V 125 kW
One Shot Pulse FF Ramp (Adjustable) 3 Buffer RAMP_OUT
4 FF IFF
5.3 kW 6.7 kW
CFF
Figure 3. NCP1561 Block Diagram http://onsemi.com
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NCP1561
PIN DESCRIPTION
Pin 1 Name Vin Application Information This pin is connected to the bulk DC input voltage supply. A constant current source supplies current from this pin to the capacitor connected on the VAUX pin. The charge current is typically 13.0 mA. Input voltage range is 21.5 V to 150 V. Input supply voltage is scaled down and sampled by means of a resistor divider. The supply voltage must be scaled such that the voltage on the UV pin is 1.54 V at the minimum input voltage. Internal Feedforward (FF) Ramp Output. This signal can be externally routed to the RAMP_IN pin for voltage-mode control operation. An external resistor between Vin and this pin adjusts the amplitude of the FF Ramp inversely proportional to Vin. By varying the Feedforward Ramp amplitude in proportion to the input voltage, changes in loop bandwidth resulting from Vin changes are eliminated. Overcurrent sense input. If the CS voltage exceeds 0.95 V or 1.15 V, the converter enters the Cycle by Cycle or Cycle Skip current limit mode, respectively. The capacitor connected to this pin sets the Cycle Skip period. Once a cycle skip fault is detected, the capacitor connected to this pin is discharged. The capacitor is then charged with a constant current of 12 mA. The cycle skip period expires, once the voltage on this capacitor reaches 2.0 V. A soft-start sequence follows at the conclusion of the fault period. A single external resistor between this pin and GND sets the fixed oscillator frequency. An external resistor between this pin and GND sets the voltage on the Max DC Comparator inverting input. The duty cycle is limited by comparing the voltage on the Max DC Comparator inverting input to the Feedforward Ramp. An internal 6.0 mA current source charges the external capacitor connected to this pin. The duty cycle is limited during startup by comparing the voltage on this pin to the Oscillator Ramp. The soft-start comparator limits the duty cycle while the SS voltage is below 2.0 V. The error signal from an external error amplifier is fed into this input and compared to the Feedforward Ramp. A series diode and resistor offset the voltage on this pin before it is applied to the PWM Comparator inverting input. Precision 5.0 V reference output. Maximum output current is 6.0 mA. This pin configures the NCP1561 for voltage or current-mode control. The internal Feedforward Ramp (voltage-mode) or a signal proportional to the inductor current (current-mode) is fed into this input and compared to the signal in the VEA pin. Output 2. Control circuit ground. Output 1. Positive input supply voltage. This pin is connected to an external capacitor for energy storage. An internal current source supplies current from Vin to this pin. Once the voltage on VAUX reaches approximately 10.3 V, the current source turns OFF. It turns ON again once VAUX falls to 7 V. During normal operation, power is supplied to the IC via this pin, by means of an auxiliary winding. The startup circuit is disabled if the voltage on the VAUX pin exceeds 10.3 V.
2 3 4
UV RAMP_OUT FF
5 6
CS CSKIP
7 8
RT DCMAX
9
SS
10
VEA
11 12
VREF RAMP_IN
13 14 15 16
OUT2 GND OUT1 VAUX
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NCP1561
MAXIMUM RATINGS (Note 1)
Rating Input Line Voltage Auxiliary Supply Voltage Auxiliary Supply Input Current OUT1 and OUT2 Voltage OUT1 and OUT2 Output Current 5.0 V Reference Voltage 5.0 V Reference Output Current All Other Inputs/Outputs Voltage All Other Inputs/Outputs Current Operating Junction Temperature Storage Temperature Range Power Dissipation at TA = 25C Thermal Resistance, Junction-to-Ambient Symbol Vin VAUX IAUX VOUT IOUT VREF IREF VIO IIO TJ Tstg PD RJA Value -0.3 to 150 -0.3 to 16 35 -0.3 to (VAUX + 0.3 V) 10 -0.3 to 6.0 6.0 -0.3 to VREF 10 -40 to 150 -55 to 150 0.77 130 Unit V V mA V mA V mA V mA _C _C W _C/W
1. Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. A. This device series contains ESD protection and exceeds the following tests: Pin 1: Pin 1 is the HV start-up of the device and is rated to the max rating of the part, or 150 V. Machine Model Method 150 V. Pins 2-16: Human Body Model 2000 V per MIL-STD-883, Method 3015. Machine Model Method 200 V.
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NCP1561
ELECTRICAL CHARACTERISTICS (Vin = 48 V, VAUX = 12 V, VEA = 2 V, RT = 101 kW, CCSKIP = 6800 pF, RD = 60.4 kW, RFF = 432 kW, for typical values TJ = 25C, for min/max values, TJ = -40C to 125C, unless otherwise noted)
Characteristic START-UP CONTROL AND VAUX REGULATOR VAUX Regulation Startup Threshold/VAUX Regulation Peak (VAUX increasing) Minimum Operating VAUX Valley Voltage After Turn-On Hysteresis Minimum Startup Voltage (Pin 1) ISTART = 1.0 mA, IREF = 0 mA, VAUX = VAUX(on) - 0.2 V Startup Circuit Output Current VAUX = 0 V TJ = 25C TJ = -40C to 125C VAUX = VAUX(on) - 0.2 V TJ = 25C TJ = -40C to 125C Startup Circuit Off-State Leakage Current (Vin = 150 V) TJ = 25C TJ = -40C to 125C Startup Circuit Breakdown Voltage (Note 2) ISTART(off) = 50 mA, TJ = 25C Auxilliary Supply Current After VAUX Turn-On Outputs Disabled VEA = 0 V VUV = 0 V Outputs Enabled LINE UNDERVOLTAGE DETECTOR Undervoltage Threshold (Vin Increasing) Undervoltage Hysteresis Undervoltage Propagation Delay to Output CURRENT LIMIT AND THERMAL SHUTDOWN Cycle by Cycle Threshold Voltage Propagation Delay to Output (VEA = 2.0 V) VCS = ILIM1 to 2.0 V, measured when OUT1 reaches 10 V. Cycle Skip Threshold Voltage Cycle Skip Charge Current (VCSKIP = 0 V) Thermal Shutdown Threshold (Junction Temperature Increasing, Note 2) Thermal Shutdown Hysteresis (Junction Temperature Decreasing, Note 2) 2. Guaranteed by design only. ILIM1 tILIM ILIM2 ICSKIP TSHDN TH 0.89 - 1.05 8.0 - - 0.95 86 1.15 12.3 180 17 1.03 150 1.24 15 - - V ns V mA C C VUV VUV(H) tUV 1.40 0.080 - 1.54 0.095 250 1.64 0.120 - V V ns V VAUX(on) VAUX(off) VH VSTART(min) ISTART 13 10 10 8.0 ISTART(off) - - VBR(DS) 150 23 - - 50 100 - V mA IAUX1 IAUX2 IAUX3 - - - 3.3 1.8 4.1 5.0 2.5 6.5 17 - 13 - 21 25 17 19 mA 9.7 6.6 - - 10.3 7.0 3.3 18.3 10.8 7.4 - 21.5 V mA Symbol Min Typ Max Unit
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NCP1561
ELECTRICAL CHARACTERISTICS (Vin = 48 V, VAUX = 12 V, VEA = 2 V, RT = 101 kW, CCSKIP = 6800 pF, RD = 60.4 kW, RFF = 432 kW, for typical values TJ = 25C, for min/max values, TJ = -40C to 125C, unless otherwise noted) (continued)
Characteristic CONTROL OUTPUTS Frequency (RT = 101 kW) TJ = 25C TJ = -40C to 125C Frequency (RT = 59 kW) TJ = 25C TJ = -40C to 125C Output Voltage (IOUT = 0 mA) Low State High State Drive Resistance (Vin = 15 V) Sink (VEA = 0 V, VOUT = 2 V) Source (VEA = 3 V, VOUT = 10 V) Rise Time (CL = 100 pF, 10% to 90% of VOH) Fall Time (CL = 100 pF, 90% to 10% of VOH) MAXIMUM DUTY CYCLE COMPARATOR Maximum Duty Cycle (Vin = 36 V) RP = 0 W, RMDP = open RP = open, RMDP = open (Note 3) Open Circuit Voltage SOFT-START Charge Current (VSS = 1.0 V) Discharge Current (VSS = 5.0 V, VUV = 1.0 V) PWM COMPARATOR Input Resistance (V1 = 1.25 V, V2 = 1.50 V) RIN(VEA) = (V2 - V1) / (I2 - I1) Lower Input Threshold Delay to Output (from VOH to 0.5 VOH) 5.0 V REFERENCE Output Voltage (IREF = 0 mA) TJ = 25C TJ = -40C to 125C Load Regulation (IREF = 0 to 6 mA) Line Regulation (VAUX = 7.5 V to 16 V) 3. 50% Maximum Duty Cycle guaranteed by design. VREF 4.9 4.8 VREF(Load) VREF(Line) - - 4.96 - 10 50 5.1 5.1 50 100 mV mV V RIN(VEA) VEA(L) tPWM 8.0 0.7 - 22 0.92 200 60 1.1 - kW V ns ISS(C) ISS(D) 5.0 20 6.2 50 7.4 - mA mA DCMAX 34 48 VDCMAX 0.49 38 - 0.74 44 50 0.90 V % fOSC1 143 137 fOSC2 228 220 VOL VOH RSNK RSRC ton toff - - 20 50 - - 240 - 0.25 11.8 36 88 32 19 252 260 V - - W 80 170 - - ns ns 150 - 157 163 kHz kHz Symbol Min Typ Max Unit
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NCP1561 TYPICAL CHARACTERISTICS
VAUX, AUXILIARY SUPPLY VOLTAGE (V) 12 ISTART, STARTUP CIRCUIT OUTPUT CURRENT (mA) 11 10 9 8 7 6 5 -50 -25 0 25 50 MINIMUM OPERATING THRESHOLD 75 100 125 150 STARTUP THRESHOLD 19 18 17 16 15 14 13 12 11 10 9 -50 -25 0 25 50 75 100 125 150 VAUX = VAUX(on) - 0.2 V VAUX = 0 V Vin = 48 V
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 4. Auxiliary Supply Voltage Thresholds versus Junction Temperature
17.5 ISTART, STARTUP CIRCUIT OUTPUT CURRENT (mA) 17.0 16.5 16.0 15.5 15.0 14.5 14.0 13.5 13.0 12.5 0 2 4 6 8 10 12 Vin = 48 V ISTART, STARTUP CIRCUIT OUTPUT CURRENT (mA) 20
Figure 5. Startup Circuit Output Current versus Junction Temperature
16
TJ = -40C TJ = 25C TJ = 125C
12
8
4 0 0 25 50 75
VAUX = VAUX(on) - 0.2 V
100
125
150
VAUX, AUXILIARY SUPPLY VOLTAGE (V)
Vin, LINE VOLTAGE (V)
Figure 6. Startup Circuit Output Current versus Auxiliary Supply Voltage
IAUX, AUXILIARY SUPPLY CURRENT (mA) 40 ISTART(off), STARTUP CIRCUIT OFF- STATE LEAKAGE CURRENT (mA) VAUX = 12 V 35 30 25 20 15 10 5 0 0 25 50 75 100 125 150 Vin, LINE VOLTAGE (V) TJ = 125C TJ = 25C TJ = -40C 4.5 4.0 3.5
Figure 7. Startup Circuit Output Current versus Line Voltage
VAUX = 12 V VEA = 0 V
3.0 2.5 2.0 1.5 1.0 0.5 -50 -25 0 25 50 75 100 125 150 VUV = 0 V
TJ, JUNCTION TEMPERATURE (C)
Figure 8. Startup Circuit Off-State Leakage Current versus Line Voltage
Figure 9. Auxiliary Supply Current versus Junction Temperature
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NCP1561 TYPICAL CHARACTERISTICS
6.0 IAUX3, OPERATING AUXILIARY SUPPLY CURRENT (mA) VUV, LINE UNDERVOLTAGE THRESHOLD (V) 5.5 5.0 4.5 4.0 3.5 3.0 fOSC = 100 kHz 2.5 -50 -25 0 25 50 75 100 125 150 fOSC = 150 kHz fOSC = 250 kHz VAUX = 12 V DC [ 50% 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 10. Operating Auxiliary Supply Current versus Junction Temperature
140 VUV(H), LINE UNDERVOLTAGE THRESHOLD HYSTERESIS (mV) 130 120 110 100 90 80 70 -50 -25 0 25 50 75 100 125 150 ILIM, CURRENT LIMIT THRESHOLDS (V) 1.30 1.25 1.20
Figure 11. Line Undervoltage Threshold versus Junction Temperature
CYCLE SKIP 1.15 1.10 1.05 1.00 CYCLE BY CYCLE 0.95 0.90 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 12. Line Undervoltage Hysteresis versus Junction Temperature
fosc, OSCILLATOR FREQUENCY (kHz) 120 115 tILIM, CURRENT LIMIT PROPAGATION DELAY (ns) 110 105 100 95 90 85 80 75 70 -50 -25 0 25 50 75 100 125 150 VAUX = 12 V Measured from VOH to 0.5 VOH 300 275 250 225 200 175 150 125 100 75 -50
Figure 13. Current Limit Thresholds versus Junction Temperature
RT = 50.6 kW
RT = 101 kW RT = 148 kW
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 14. Current Limit Propagation Delay versus Junction Temperature
Figure 15. Oscillator Frequency versus Junction Temperature
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NCP1561 TYPICAL CHARACTERISTICS
fosc, OSCILLATOR FREQUENCY (kHz) fosc, OSCILLATOR FREQUENCY (kHz) 157.5 RT = 101 kW 155.0 152.5 150.0 147.5 145.0 142.5 -50 300 250 200 150 100 50 0 50 100 150 200 250 300 350 400 RT, TIMING RESISTOR (kW) TJ = 25C DC [ 50%
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (C)
Figure 16. Oscillator Frequency versus Junction Temperature
RSNK/SRC OUTPUTS DRIVE RESISTANCE (W) 120 ton, OUTPUTS RISE TIME (ns) 110 VAUX = 12 V 100 90 80 70 60 50 40 30 20 -50 RSNK (VEA = 3 V, VOUT = 2 V) -25 0 25 50 75 100 125 150 RSRC (VEA = 0 V, VOUT = 10 V) 80 70 60 50 40 30 20 10 0 0
Figure 17. Oscillator Frequency versus Timing Resistor
Measured from 10% to 90% of VOH VAUX = 12 V TJ = 25C
TJ = 125C
TJ = -40C
25
50
75
100
125
150
175
200
TJ, JUNCTION TEMPERATURE (C)
CL, LOAD CAPACITANCE (pF)
Figure 18. Outputs Drive Resistance versus Junction Temperature
35 toff, OUTPUTS FALL TIME (ns) Measured from 90% to 10% of VOH 30 VAUX = 12 V 25 20 15 10 5 0 0 25 50 75 100 125 150 175 200 CL, LOAD CAPACITANCE (pF) TJ = -40C TJ = 125C TJ = 25C FEEDFORWARD INTERNAL RESISTANCE (kW) 19 18 17 16 15 14 13 12 11 10 9 -50
Figure 19. Outputs Rise Time versus Load Capacitance
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (C)
Figure 20. Outputs Fall Time versus Load Capacitance
Figure 21. Feedforward Internal Resistance versus Junction Temperature
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NCP1561 TYPICAL CHARACTERISTICS
DCMAX, MAXIMUM DUTY CYCLE (%) 45 40 35 30 25 20 15 10 5 0 0 75 150 225 300 375 450 525 IFF, FEEDFORWARD CURRENT (mA) TJ = -40C TJ = 125C VEA = 3.0 V DCMAX PIN = OPEN DCMAX, MAXIMUM DUTY CYCLE (%) 50 50 RP = OPEN, RMDP = OPEN 45 40 35 30 25 20 -50 RP = 0 W, RMDP = OPEN Vin = 36 V RFF = 432 kW
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (C)
Figure 22. Maximum Duty Cycle versus Feedforward Current
ISS(D), SOFT-START DISCHARGE CURRENT (mA) ISS(C), SOFT-START CHARGE CURRENT (mA) 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 -50 -25 0 25 50 75 100 DISCHARGE CHARGE 70 65 60 55 50 45 40 35 30 125 150 50
Figure 23. Maximum Duty Cycle versus Junction Temperature
RIN(VEA), VEA INPUT RESISTANCE (kW)
40
30
20
10 0 -50
-25
0
25
50
75
100
125 150
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 24. Soft-Start Charge/Discharge Currents versus Junction Temperature
1.00 VREF, REFERENCE VOLTAGE (V) RFF = 432 kW Vin = 48 V 5.01
Figure 25. VEA Input Resistance versus Junction Temperature
VEA(L), PWM COMPARATOR LOWER INPUT THRESHOLD (V)
0.95
4.99
0.90
4.97 IREF = 0 mA 4.95 IREF = 6 mA 4.93 4.91 -50
0.85
0.80 0.75 -50
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 26. PWM Comparator Lower Input Threshold versus Junction Temperature
Figure 27. Reference Voltage versus Junction Temperature
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NCP1561
DETAILED OPERATING DESCRIPTION The NCP1561 is a push-pull PWM controller for use in 48 V telecom power converters or 42 V automotive systems. This controller contains all the features and flexibility required in high density isolated dc-dc modules and on-board designs for telecom and automotive systems. It can be configured for operation in voltage-mode with feedforward or current-mode control. The extensive set of features included in the NCP1561 facilitates system design and reduces overall system cost and component count by incorporating supervisory functions and components traditionally found outside the controller. Features of the NCP1561 include a high voltage startup regulator, fast line feedforward, a line undervoltage lockout, dual mode overcurrent protection, programmable maximum duty cycle limit, programmable soft start and external voltage reference. Voltage-mode operation with line feedforward provides better line regulation without some of the traditional problems associated with current-mode control. The controller is configured for voltage-mode operation by routing the internal Feedforward Ramp output (RAMP_OUT) to the PWM Comparator non-inverting input (RAMP_IN). The amplitude of the Feedforward Ramp varies inversely proportional to the input voltage. Operation in current-mode control is obtained by routing a signal proportional to the inductor current into the PWM Comparator non-inverting input (VEA pin). In either mode, the maximum duty cycle is inversely proportional to the line voltage, as configured by the DCMAX pin and FF pins. High Voltage Start-up Regulator The NCP1561 contains an internal high voltage start-up regulator that eliminates the need for external start-up components. In addition, this regulator increases the efficiency of the supply as it uses no power when in the normal mode of operation, but instead uses power supplied by an auxiliary winding. The startup regulator consists of a constant current source that supplies current from the input line voltage (Vin) to the capacitor on the VAUX pin (CAUX). The startup current is typically 13.0 mA. Once VAUX reaches approximately 10.3 V, the start-up regulator turns OFF and the outputs are enabled. When VAUX reaches 7 V, the outputs are disabled and the startup regulator turns ON. This mode of operation is known as Dynamic Self Supply (DSS). The startup circuit sources current out of the VAUX pin. It is recommended to place a diode between CAUX and the auxiliary supply as shown in Figure 28. This will allow the NCP1561 to charge CAUX while preventing the startup regulator from sourcing current into the auxiliary supply.
ISTART ISTART VAUX IAUX Disable CAUX To auxiliary supply
Vin
Isupply
Figure 28. Recommended VAUX Configuration
Power to the controller while operating in the self-bias or DSS mode is provided by CAUX. Therefore, CAUX must be sized such that a VAUX voltage greater than 7 V is maintained while the outputs are enabled and the converter reaches regulation. Also, the VAUX discharge time (from 10.3 V to 7 V) must be greater than the soft-start charge period to assure the converter turns ON. The startup circuit is rated at a maximum voltage of 150 V. If the device operates in the DSS mode, power dissipation should be controlled to avoid exceeding the maximum power dissipation of the controller. The startup regulator is disabled by biasing VAUX above 7 V once the outputs are enabled. It can also be disabled by biasing VAUX above VAUX(on) (typically 10.3 V). This feature allows the NCP1561 to operate from an independent 12 V (10%) supply. The independent supply should keep VAUX above VAUX(on). Otherwise the Output Latch will not be SET and the outputs will remain OFF after a fault condition is cleared. If operating from an independent supply, the Vin and VAUX pins should be connected together.
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NCP1561
Line Undervoltage Shutdown The NCP1561 incorporates a line undervoltage shutdown (UV) circuit. The undervoltage threshold is approximately 1.54 V. The UV circuit can be biased using an external resistor divider from the input line. The resistor divider must be sized to enable the controller once Vin is within the required operating range.
VAUX(on) VAUX VAUX(off) 0V 2V 0V 2V 0V UV Voltage Soft-Start Voltage
Once the UV condition is removed and VAUX reaches VAUX(on), the controller initiates a soft-start cycle, as shown in Figure 29. The UV pin can also be used to implement a remote enable/disable function. Biasing the UV pin below its UV threshold disables the converter.
SOFT-START
OUT2 0V
OUT1 0V
Figure 29. Soft-Start Timing Diagram (Using Auxiliary Winding)
If the UV threshold is reached, once in normal operation, the soft-start capacitor is discharged, and the outputs are immediately disabled as shown in Figure 30. Also, if an UV
VAUX(on) VAUX VAUX(off) 0V
condition is detected, the 5.0 V Reference Supply is disabled.
UV Fault UV Voltage VUV 0V Propagation Delay to Outputs (tUV) OUT1 0V
OUT2 0V
Figure 30. UV Fault Timing Diagram
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NCP1561
Feedforward Ramp Generator The NCP1561 incorporates line feedforward (FF) to compensate for changes in line voltage. A FF Ramp proportional to Vin is generated and compared to the error signal. If the line voltage changes, the FF Ramp slope changes accordingly. The duty cycle will be adjusted immediately instead of waiting for the line voltage change to propagate around the system and be reflected back on VEA. A resistor between Vin and the FF pin (RFF) sets the feedforward current (IFF). The FF Ramp is generated by charging an internal 10.8 pF capacitor (CFF) with a constant current proportional to IFF. The FF Ramp is finished (capacitor is discharged) once the Oscillator Ramp reaches 2.0 V. Please refer to Figure 3 for a functional drawing of the Feedforward Ramp generator. IFF is usually a few hundred microamps, depending on the operating frequency and the required duty cycle. If the operating frequency and maximum duty cycle are known, IFF is calculated using the equation below:
IFF + CFF VDC(inv) 125 kW 6.7 kW ton(max)
For example, if a system is designed to operate at an oscillator frequency of 150 kHz, with a 45% maximum duty cycle at 36 V, the DCMAX pin can be grounded and IFF is calculated as follows:
1 T+1+ + 6.66 ms 150 kHz f ton(max) + DCMAX IFF + + T + 0.45 6.66 ms + 3.0 ms
CFF VDC(inv) 125 kW 6.7 kW ton(max) 10.8 pF 1.0 V 125 kW + 67.2 mA 6.7 kW 3.0 ms
As the minimum line voltage is 36 V, the required feedforward resistor is calculated using the equation below:
V RFF + in * 12.0 kW + 36 V * 12.0 kW [ 523 kW IFF 67.2 mA
where VDC(inv) is the voltage on the inverting input of the Max DC Comparator and ton(max) is the maximum ON time. Figure 22 shows the relationship between IFF and DCMAX.
From the above calculations it can be observed that IFF is controlled predominantly by the value of RFF, as the resistance seen into the FF pin is only 12 kW. If a tight maximum duty cycle control over temperature is required, RFF should have a low thermal coefficient. If current-mode control is used and the FF Ramp generator is not used for maximum duty cycle control, the FF Ramp generator can be disabled grounding the FF pin.
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NCP1561
Current Limit The NCP1561 has two overcurrent protection modes, cycle by cycle and cycle skip. It allows the NCP1561 to handle momentary and hard shorts differently for the best tradeoff in system performance and safety. The outputs are disabled typically 86 ns after a current limit fault is detected. The cycle by cycle mode terminates the conduction cycle (reducing the duty cycle) if the voltage on the CS pin exceeds 0.95 V. The cycle skip mode is enabled if the voltage on the CS pin reaches 1.15 V. Once a cycle skip fault is detected, the outputs are disabled, the soft-start and cycle skip capacitors are discharged, and the cycle skip period (TCSKIP) commences.
NORMAL OPERATION VAUX(on) VAUX VAUX(off) ILIM Faults
The cycle skip period is set by an external capacitor (CCSKIP). Once a cycle skip fault is detected, the cycle skip capacitor is discharged followed by a charge cycle. The charge current is 12.3 mA. The cycle skip period ends when the voltage on the cycle skip capacitor reaches 2.0 V. If the cycle skip period is known, the cycle skip capacitor is calculated using the equation below:
CCSKIP [ TCSKIP 2V 12.3 mA
Using the above equation, a cycle skip period of 11.0 ms requires a cycle skip capacitor of 68 pF. The differences between the cycle by cycle and cycle skip modes are shown in Figure 31.
SOFT-START
RESET
0V
OUT1
0V
OUT2
0V ILIM2 ILIM1 CS Voltage 0V TCSKIP Cycle Skip Voltage 2V 0V
Figure 31. Overcurrent Faults Timing Diagram
Once the cycle skip period is complete and VAUX reaches VAUX(on), a soft-start sequence commences. The possible minimum OFF time is set by CCSKIP. The actual OFF time is generally greater than the cycle skip period if operating in DSS because it is the cycle skip period added to the time it takes VAUX to cycle between VAUX(off) and VAUX(on). If operating from an independent supply, the OFF time is the cycle skip period. Oscillator The NCP1561 oscillator frequency is set by a single external resistor connected between the RT pin and GND. The oscillator is designed to operate up to 250 kHz.
The voltage on the RT pin is laser trim adjusted during manufacturing to 1.3 V for an RT of 101 kW. A current set by RT generates an Oscillator Ramp by charging an internal 10 pF capacitor as shown in Figure 3. The period ends (capacitor is discharged) once the Oscillator Ramp reaches 2.0 V. If RT increases, the current and the Oscillator Ramp slope decrease, thus reducing the frequency. If RT decreases, the opposite effect is obtained. Figure 17 shows the relationship between RT and the oscillator frequency.
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NCP1561
Maximum Duty Cycle A dedicated internal comparator limits the maximum ON time by comparing the FF Ramp to VDC(inv) as shown in Figure 3. If the FF Ramp voltage exceeds VDC(inv), the output of the Max DC Comparator goes high. This will reset the Output Latch, thus turning OFF the outputs and limiting the duty cycle. Duty cycle is defined as:
t DC + on + ton T f
5.0 V Reference The NCP1561 includes a precision 5.0 V reference output. The reference output is biased directly from VAUX and it can supply up to 6 mA. Load regulation is 50 mV and line regulation is 100 mV within the specified operating range. It is recommended to bypass the reference output with a 0.1 mF ceramic capacitor. The reference output is disabled when an UV fault is present. PWM Comparator In steady state operation, the PWM Comparator adjusts the duty cycle by comparing the error signal to the FF Ramp (voltage-mode) or a ramp proportional to the inductor current (current-mode). The error signal is fed into the VEA input. The FF Ramp or the inductor ramp is fed into the RAMP_IN pin. If operating in voltage-mode, the connection between the RAMP_OUT and RAMP_IN pins should be as close as possible to minimize parasitic inductance. It can be easily routed underneath the package. The VEA input can be driven directly with an optocoupler and a pull up resistor (REA) from VREF as shown in Figure 33. The drive of the control pin is simplified by internally incorporating a series diode and resistor. The series diode provides a 0.7 V offset between the VEA input and the PWM Comparator inverting input. The outputs are enabled if the VEA voltage is approximately 0.7 V above the valley voltage of the ramp (Vvalley) in the RAMP_IN pin.
VREF 11 REA PWM Comparator - + 2 kW + 20 kW VEA - Vpeak RAMP_IN 12 Vvalley 0V VEA 10 Feedback Signal
Therefore, the maximum ON time can be set to yield the desired DC if the operating frequency is known. The maximum ON time is set by adjusting the FF Ramp to reach VDC(inv) in a time equal to ton(max) as shown in Figure 32. The maximum ON time should be set for the minimum line voltage. As line voltage increases, the slope of the FF Ramp increases. This reduces the duty cycle below DCMAX, which is a desirable feature as the duty cycle is inversely proportional to line voltage.
Oscillator Ramp 2V
0V
T
FF Ramp 0V ton(max)
VDC(inv)
Figure 32. Maximum ON Time Limit Waveforms
An internal resistor divider from a 2.0 V reference is used to set VDC(inv). If the DCMAX pin is grounded, VDC(inv) is 1.0 V. If the pin is floating, VDC(inv) is 1.4 V. This is equivalent to 71% (36% DC) or 100% (50% DC) of a FF Ramp, with a peak voltage of 1.4 V. VDC(inv) can be adjusted to other values by placing an external resistor network on the DCMAX pin. For example, if the minimum line voltage is 36 V, RFF is 432 kW, oscillator frequency is 150 kHz and a maximum duty cycle of 45% is required, VDC(inv) is calculated as follows:
VDC(inv) + VDC(inv) + IFF 6.7 kW CFF ton(max) 125 kW
FF Ramp or Inductor Ramp
Figure 33. Optocoupler driving VEA input
81.0 mA 6.7 kW 3.0 ms +1.2 V 10.8 pF 125 kW
This can be achieved by connecting a 23.44 kW resistor from the DCMAX pin to GND. The maximum duty cycle limit can be disabled connecting a 100 kW resistor between the DCMAX and VREF pins.
The pull-up resistor is selected such that in the absence of the error signal, the voltage on the VEA pin exceeds the peak amplitude of the ramp in the RAMP_IN pin. Otherwise, the converter may not be able to reach maximum duty cycle. If operating in voltage-mode, REA is calculated using the equation below:
REA t 22 kW VREF * 0.7 V *1 0.0515 I Vvalley ) C fFF
FF
where, CFF is the internal FF capacitor, typically 10.8 pF.
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NCP1561
Soft-Start Soft-start (SS) allows the converter to gradually reach steady state operation, thus reducing startup stress and surges on the system. The duty cycle is limited during a soft-start sequence by comparing the Oscillator Ramp to the SS voltage (VSS) by means of the Soft-Start Comparator. Once faults are removed and VAUX reaches VAUX(on), a 6.2 mA current source starts to charge the capacitor on the SS pin. The Soft-Start Comparator controls the duty cycle while the SS voltage is below 2.0 V. Once VSS reaches 2.0 V, it exceeds the Oscillator Ramp voltage and the Soft-Start Comparator does not limit the duty cycle. Figure 34 shows the relationship between the outputs duty cycle and the soft-start voltage.
Oscillator Ramp VSS OUT1
OUT2
Figure 35. Control Outputs Timing Diagram
OUT1
Once VAUX reaches VAUX(on), the internal startup circuit is disabled and the One Shot Pulse Generator is enabled. If no faults are present, the outputs turn ON. Otherwise, the outputs remain OFF until the fault is removed and VAUX reaches VAUX(on) again. The control outputs are biased from VAUX. The outputs can supply up to 10 mA each and their high state voltage is usually 0.2 V below VAUX. Therefore, the auxiliary supply voltage should not exceed the maximum input voltage of the driver stage. If the control outputs need to drive a large capacitive load, a driver should be used between the NCP1561 and the load. Figures 19 and 20 show the relationship between the output's rise and fall times vs capacitive load. Thermal Protection Internal Thermal Shutdown Circuitry is provided to protect the integrated circuit in the event the maximum junction temperature is exceeded. When activated, typically at 180_C, the controller is forced into a low power reset state, discharging the soft-start capacitor and disabling the output drivers and the bias regulator. Once the junction temperature falls below 163_C, the NCP1561 enters a soft-start mode and it is allowed to resume normal operation. This feature is provided to prevent catastrophic failures from accidental device overheating. Application Information A dc-dc converter for a 48 V telecom system is designed and implemented using the NCP1561. The converter delivers 125 W at 2.5 V and achieves a full load efficiency of 85%. The system is built using a 4 layer FR4, single sided board. The converter footprint is 3.25 in x 3.75 in. The components location within the board is shown in Figure 36 and the complete circuit schematic is shown in Figure 37. The Bill of Material is listed in Table 1. The layout files are available. Please contact your sales representative for more information.
OUT2
Figure 34. Soft Start Timing Diagram
If the soft start period is too long, VAUX may discharge to 7 V before the converter output is completely in regulation causing the outputs to be disabled. If the converter output is not completely discharged when the outputs are re-enabled, the converter will eventually reach regulation exhibiting a non-monotonic startup behavior. But, if the converter output is completely discharged when the outputs are re-enabled, the cycle may repeat and the converter will not start. In the event of an UV or cycle skip fault, the soft-start capacitor is discharged. Once the fault is removed, a soft-start cycle commences. The soft-start steady state voltage is approximately 4.1 V. Control Outputs The NCP1561 has two off-phase control outputs, OUT1 and OUT2. Figure 35 shows the relationship between OUT1 and OUT2.
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NCP1561
3.25"
3.75"
Figure 36. Demo Board Top View
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OUTB CR2 BAV70 X5 MMBT2907 R20 10k U2
8 7 6 5
CR1 BAV70 VAUX Q1 110N02 CR3 BAV70 C11 0.22 R18 6.2 1000p SEC_PWR CR4 BAV70 PAYTON_9557 TX1 3T 1T 1T R19 6.2 Q4 110N02 1000p C26 C25 Q2 110N02
R8 24.9k R9 249k LM2931
1 Vout 2 GND 3 4 GND ADJ Vin GND GND SD
E1 PULSE_PS8202T
L1 2.2 mH
C1 10 T1 4T CR6 BAV70 R12 C12 1000p R11 6.98 10k CR9 BAV70 CR8 BAV70 TX3 PULSE_P0544 C14 0.1 C15 0.1 BAV70 VAUX CR12 CR10 BAV70 X7 Q5 110N02 R21 10k X6 MMBT2907 MMBT2907
+ 36 - 72 V - E2 R10 100 R31 6.2 C36 SUD40N10-25 1000p Q3 R13 10k
C3 10
L2 1.0 mH
E5
C2 10
C4 10
C24 0.1
C23 0.1
C27 47
C28 + C29 + C30 330 330 47
+ 2.5 V - E4
R22 10.0 R34 C40 OPEN OPEN
NCP1561
Figure 37. NCP1561 Demo Board Circuit Schematic
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R3 523k CR13 BAV70 CR11 BAV70 R14 10k SUD40N10-25 PULSE_P0544 Q6 TX4 C17 0.1 VAUX
8
19
U3 1 8 N/C C21 2 N/C_1 7 R15 100p 3 IN_A OUT_A 6 GND VCC 4 IN_B OUT_B 5 CR14 1.0k BAV70 MC33152 C13 0.1 R16 1.0k U1
1
R1 1M
R2 100
R23 1.43k
R29 5.49k
R27 C33 1800p C34 100p C32 680p R28 21.0k 10k
E3 C22 100p CR16 BAV70 U4
N/C C37 2 N/C_1 47p IN_A OUT_A 7 3 GND VCC 6 4 IN_B OUT_B 5
C5 0.1
R35 0 C39 2700p R36 C16 0.1 C20 0.1 TX5 C19 C18 0.1 0.1 OUTB CR15 BAV70 - + U6B LM258 0 U6A LM258 SEC_PWR - + 21.0k C31 0.1 R26
R25 19.6k R24 20.5k
ON/OFF
C6 R4 0.01 46.4k R32 750 BAV70 CR17 R7 OPEN R33 750 C10 C9 0.12 1000p R6 124k C38 47p
VAUX
5V REF C7 22
R5 OPEN
1 3 12 2 16 11 8 14 4 5 15 13 10 6 9 7
MC33152 5V REF
Vin VFF RAMP_OUT CS RAMP_IN Out1 UV Out2 Vaux Vea Vref C_Skip DCmax SS GND RT
PULSE_P0544
CR18 BAV70 U7 TVL431A CR19 OPEN R37 0 R17 29.4k U8 SFH615A-4 C35 1000p R30 6.04k
C8 0.1
NCP1561
NCP1561
Table 1. NCP1561 Demo Board Bill of Material
Quantity 4 13 1 1 5 1 1 3 2 2 1 1 1 2 1 1 16 1 1 1 4 2 1 2 1 1 3 1 1 5 1 1 2 1 3 1 1 1 1 2 1 1 1 3 1 1 3 1 1 2 1 1 1 3 Part Reference C1-C4 C5, C8, C13-C20, C23, C24, C31 C6 C7 C9, C12, C25, C26, C35 C10 C11 C21, C22, C34 C27, C28 C29, C30 C32 C33 C36 C37, C38 C39 C40 CR1-CR4, CR6, CR8-CR18 CR19 L1 L2 Q1, Q2, Q4, Q5 Q3, Q6 R1 R2, R10 R3 R4 R5, R7, R34 R6 R9 R12, R13, R14, R20, R21 R8 R11 R15, R16 R17 R18, R19, R31 R22 R23 R24 R25 R26, R28 R27 R29 R30 R32, R33 R35-R37 T1 TX1 TX3-TX5 U1 U2 U3, U4 U6 U7 U8 X5-X7 Part C5750X7R1H106M C3216X7R2A104K C2012X7R1H103K C4532X7R1C226MT VJ0805A102KXBAT VJ1206Y124KXXAT C3216X7R1H224KT VJ0805A101KXBAT C4532X5R0J476M T495X337K006AS VJ0805A681KXBAT VJ1206A182KXBAT VJ1206A102KXBAT VJ0805A470KXBAT VJ1206A272KXBAT - BAV70LT1 - DO3316P-222 9558 NTD110N02R SUD40N10-25 CRCW12061004FRE4 CRCW1206101JRT1 CRCW12065233FRT1 CRCW12064642FRT1 - CRCW12061243FRT1 CRCW12062493FRT1 CRCW1206103JRT1 CRCW12062492FRT1 CRCW12066R98FRT1 CRCW12061001FRT1 CRCW12062942FRT1 CRCW25126R19FRT1 CRCW080510R0FRT1 CRCW12061431FRT1 CRCW12062052FRT1 CRCW12061962FRT1 CRCW12062102FRT1 CRCW1206103JRT1 CRCW12065491FRT1 CRCW12066041FRT1 CRCW12067500FRT1 CRCW0603000ZT PS8202T 9557 P0544 NCP1561DR2 LM2931CD MC33152D LM258D TVL431ASNT1 SFH6156-4 MMBT2907AWT1 Value 10 mF 0.1 mF 0.01 mF 22 mF 1000 pF 0.12 mF 0.22 mF 100 pF 47 mF 330 mF 680 pF 1800 pF 1000 pF 47 pF 2700 pF OPEN - OPEN 2.2 mH 1.0 mH - - 1M 100 523k 46.4k OPEN 124k 249k 10k 24.9k 6.98 1.0k 29.4k 6.2 10 1.43k 20.5k 19.6k 21.0k 10k 5.49k 6.04k 750 0 - - - - - - - - - - Vendor TDK TDK TDK TDK Vishay (VITRAMON) Vishay (VITRAMON) TDK Vishay (VITRAMON) TDK KEMET Vishay (VITRAMON) Vishay (VITRAMON) Vishay (VITRAMON) Vishay (VITRAMON) Vishay (VITRAMON) - ON Semiconductor - COILCRAFT PAYTON ON Semiconductor VISHAY Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) - Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) Vishay (DALE) PULSE PAYTON PULSE ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor VISHAY ON Semiconductor Comments 50 V 100 V 50 V 16 V 100 V 25 V 25 V 100 V 6.3 V 6V 100 V 100 V 100 V 100 V 100 V OPEN Dual Diode OPEN
24 V, N-MOSFET 100 V, N-MOSFET 1% 5% 1% 1% OPEN 1% 1% 5% 1% 1% 1% 1% 5% 1% 1% 1% 1% 1% 5% 1% 1% 1% 5% Current Sense Transformer Power Transformer Gate Drive Transformer Controller Voltage Regulator MOSFET Driver Dual OpAmp Regulator Poptocoupler PNP transistor
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NCP1561
PACKAGE DIMENSIONS
SO-16 D SUFFIX CASE 751B-05 ISSUE J
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
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NCP1561
The product described herein (NCP1561) may be covered by one or more U.S. patents. There may be other patents pending.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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NCP1561/D

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